This invention relates generally to the field of computer hardware apparatus configuration and more specifically to a system and method of programming, reprogramming, and utilizing the hardware configuration of a reconfigurable computing board interfacing with a host computer.
Typically hardware configurations for reconfigurable computing systems are designed for specific single applications to run one at a time with the reconfigurable computing system. Although an application""s configuration may contain multiple hardware functions, the configuration is not usually designed for allowing different, unrelated applications to simultaneously share a single reconfigurable computing Field Programmable Gate Array (xe2x80x9cFPGAxe2x80x9d) level resource. The ability for a single configuration file to contain multiple independent hardware objects that interface to multiple application programs running on a host system is increasingly important as reconfigurable computing technology migrates to mainstream computing environments.
Currently existing reconfigurable computing interface driver programs lack additional capabilities that are needed in today""s multi-tasking environments.
These include the managing of multi-tasking and multi-use of reconfigurable computing objects, transparent relocation of hardware objects, and flexible hardware interrupts for multiple hardware objects in reconfigurable computing systems. It is also common that each individual application configuration often has a corresponding unique software driver for interfacing application software, instead of having a single driver that all software applications can utilize.
The use of relocatable objects in the software environment is commonplace and has helped significantly advance application software development. However, when a functional object is implemented in hardware, the possibilities of one hardware object conflicting with another hardware object""s address space becomes a real possibility. An accepted way to address this today with any type of hardware board is the use of a controller circuit between the host processor (system) and the hardware board, which allows hard-wired addresses on the peripheral board to be offset by a value determined by the host processor. The host processor may then manage offsets of all such peripherals so that none conflict with any other. Further, when multiple hardware objects used by different applications are shared in a common configuration implemented through a reconfigurable computing system board, conflicts due to the use of a single allocated interrupt for the board can arise if the hardware objects use interrupt functions.
Additionally, current reconfigurable computing systems do not possess the capability to allow hardware objects to be partitioned and repartitioned into different FPGAs on the same board. The ability to have multiple FPGAs on the same reconfigurable computing board, which can then be used to implement multiple hardware objects contained in a single configuration file among the different FPGAs, makes it possible for an application to run multiple configuration files simultaneously or to load different configuration files to be used in sequence. Furthermore, such a partitionable reconfigurable computing board has the capability for multiple applications to each load a configuration file on a separate FPGA. Similarly, a single application can use multiple hardware objects contained within different reconfigurable boards or FPGAs within the same board in a system. Hardware objects partitioned into the same or different FPGAs on the same board can then be allocated intelligently as the need arises.
Different types of FPGA""s used in a reconfigurable computing board require different implementations of a configuration file which may contain the same equivalent logic circuitry. Current reconfigurable computing systems do not have the capability for multiple configuration files targeted for different types of FPGA""s, and providing the same or similar functionality, to be selected as necessary to properly interface a software application with the FPGA hardware type that is available in a system. The ability for an application program to be independent of the particular FPGA type used on a reconfigurable computing system board increases the flexibility associated with software and decreases the cost associated with software application development. The same is true for other board circuitry and for different hardware object versions.
Reconfigurable computing systems that can implement and perform highly algorithmic, repeated power-hungry tasks in hardware rather than in software can be especially useful in a portable computing environment. In a portable environment, both power and host system (processor) capabilities are at a premium, since a portable computing platform is by its nature limited in functionality by power requirements and physical size. A reconfigurable computing system that increases both the functionality and efficiency of a portable computer is therefore highly desirable.
In the personal computing environment additional functionality or interface capabilities can be provided by a Personal Computer Memory Card International Association (xe2x80x9cPCMCIAxe2x80x9d) card. These computer cards meet the minimum compliance requirements of the PCMCIA standard (which is hereby incorporated by reference). PCMCIA cards are typically used to add functionality or memory to a personal, portable or desktop computer (i.e., a host computer), as described in the PCMCIA standards. Many types of PCMCIA cards are available, including input/output (I/O), PCMCIA cards that transfer data between a host computer system and an I/O bus, and data acquisition PCMCIA cards.
A typical PCMCIA card includes a standard PCMCIA connector connected to a PCMCIA interface circuit through a standard PCMCIA bus. The PCMCIA interface circuit operates according to the standard PCMCIA protocol to send data to and receive data from a host computer. The typical PCMCIA card also may include an interface circuit and controls the operation of the functional hardware on the card. For example, if the PCMCIA card is a memory card, then the functional hardware is memory (e.g., a bank of random access memory (xe2x80x9cRAMxe2x80x9d), chips, or a hard disk drive) and the PCMCIA card controller controls reading and writing to the memory.
PCMCIA card core functions can be implemented as hard-wired logic or as programmable logic (e.g., one or more FPGAs). The programmable architecture of FPGAs is provided through programmable logic blocks interconnected by a hierarchy of routing resources. The FPGA are customized by loading programming data into internal static memory cells. FPGA programming data are design-specific data that define the functional operation of the FPGAs"" internal blocks and their interconnections. These programming data can be implemented and stored as configuration files by the application requesting the use of the FPGA.
Typically, when a PCMCIA card having the PCMCIA card controller and interface circuit implemented in an FPGA(s) is inserted into an operating (i.e., powered) host computer, or is inserted into a powered-down host computer that is then powered-up, the FPGA is programmed with programming data stored in non-volatile memory (e.g., EPROM, EEPROM, flash memory, etc.) on the PCMCIA card. Additionally, the FPGA can be programmed upon the initialization of a new application within the host computer. However, the memory required to store the FPGA programming data generally consumes a measurable area of the PCMCIA card which could be used to provide other functions within the PCMCIA card.
Therefore, there is a need for an improved reconfigurable computing system and method with the ability to allow a software driver for a reconfigurable computing platform to translate hardware object address offsets for the application software. As hardware object libraries continue to be developed, and as FPGAs continue to increase in circuit density, the necessity to combine multiple hardware objects within a common configuration file without requiring a previously released application software to be recompiled becomes a valuable capability.
There is also a need for an improved reconfigurable computing system and method with the ability to communicate information concerning hardware objects implemented in a configuration file to the reconfigurable computing software driver.
Additionally, there is a need for a reconfigurable computing system and method having a reconfigurable computing software driver with the ability to support multiple interrupts through a single host machine""s interrupt line from a reconfigurable computing platform through the use of an interrupt flag and enable registers.
Similarly, a need exists for a reconfigurable computing software driver with the ability to call an interrupt event service routine provided by a software application when a corresponding interrupt is detected.
Moreover, there is a need for a partitionable reconfigurable computing system with the ability to allow hardware objects to be partitioned into the same or different FPGAs on the same board and allocated intelligently as the need for the hardware objects arises. There is also a need for a reconfigurable computing system that allows for multiple configuration files providing the same or similar functionality that are each targeted and configured to properly interface with different types of FPGAs (i.e., difference in either gate capacity, size, vendor, etc.)
Yet another need exists for a reconfigurable computing system having a software driver with the ability to manage the allocation of reconfigurable computing resources, hardware object usage, and sharing for application software programs. Additionally, a software driver is needed with the ability to pass unique location xe2x80x9chandlesxe2x80x9d for hardware objects to software applications, and with the ability to determine from the reconfigurable computing card""s resource information (which can be stored on or off the card) whether or not a given reconfigurable computing card meets the requirements of an application requesting services.
A further need exists for a reconfigurable computing system and method that allows a single configuration file to contain multiple hardware objects that may be used by many different dependent or independent software applications and that allows for a single hardware object to be shared by multiple software applications, or for a software application to utilize multiple hardware objects located on different reconfigurable computing boards in a system.
There is also a need for a reconfigurable computing system and method with the ability to allow a reconfigurable platform board to gain a boost in available power supply current through a peripheral power supply when the host machine is unable to supply enough power for a required application. Likewise, the need exists for a reconfigurable computing system and method with the ability for an external peripheral to supply a voltage supply of varying voltages for specifying what the interface voltage of I/O signals to an interface card should be.
Additionally, a need exists for a reconfigurable computing system and method having the capability to store FPGA programming data in configuration files within the host system memory.
In accordance with the present invention, a reconfigurable computing system and method are provided that substantially eliminate or reduce disadvantages and problems associated with previously developed reconfigurable computing systems and methods.
More specifically, the present invention provides a reconfigurable computing system and method for interfacing a plurality of application programs running on a host system to one or more hardware objects defined in one or more configuration files. The system includes reconfigurable computing circuitry comprising flexibly configurable circuitry operable for interfacing and implementing one or more hardware objects with one or more of the application programs. The system further includes memory circuitry associated with the reconfigurable computing circuitry for system information storage, and communications interfaces for connecting the reconfigurable computing circuitry and the memory to the host computer.
The flexibly configurable circuitry further comprises one or more FPGAs, one or more programmable logic devices (xe2x80x9cPLDsxe2x80x9d), SRAM and EEPROM memory, and all the necessary connectors and support circuitry. Alternatively, Application Specific Integrated Circuits (xe2x80x9cASICsxe2x80x9d) can be used in place of PLDs. The reconfigurable computing system and method of the present invention can be implemented on either a PCMCIA platform, a PCI platform, or any other bus structure without changing the basic functionality and claimed functionality of the reconfigurable computing system. Additionally, the reconfigurable computing system and method of this invention is suited to be implemented in and benefit a portable computing environment.
Additional embodiments of the reconfigurable computing system and method of the present invention provide a method and system to allow hardware objects to be partitioned into different FPGAs on the same board and allocated intelligently as the need for the objects arises. The method and system of this invention are independent of the type of FPGA used and allow for multiple configuration files that can provide the same or similar functionality and are each targeted to configure differing types of FPGAs. The reconfigurable computing software driver of the reconfigurable computing system and method of this invention has the ability to pick out the appropriate configuration file for a requested hardware object for the hardware type that is available in the system.
A further embodiment of the present invention provides a reconfigurable computing system and method with the ability to manage the allocation of reconfigurable computing resources, hardware object usage and sharing for application software programs. In this method and system a single configuration file may contain multiple hardware objects that can be used by different dependent or independent software applications. Also, a single hardware object can be shared by multiple software applications. Further, a software application can utilize multiple hardware objects located on different reconfigurable computing boards in a system. The method further provides for the storage of a reconfigurable computer card""s resource information on or off the card such that the reconfigurable computing method may determine if a particular card meets the requirements of an application requesting services.
Still further embodiments of the apparatus, method and system of this invention provide for communicating hardware object information stored in a header located within the configuration file to application programs, for independent relocatable hardware object interrupts, for interrupt handling application message buffer passing (the ability for a software application to provide an interrupt event service routine that the reconfigurable computing software driver may call when an interrupt is detected), and for supplying voltage to the reconfigurable computing system through an external power supply.
Accordingly, it is an object of this invention to substantially improve the operability of reconfigurable computing platforms. A technical advantage of the improved reconfigurable computing system and method of this invention is the ability to allow a software driver for a reconfigurable computing platform to translate hardware object address offsets for the application software. As hardware object libraries continue to be developed, and as FPGAs continue to increase in circuit density, the necessity to combine multiple hardware objects within a common configuration file without requiring a previously released application software to be recompiled becomes a valuable capability.
A further technical advantage of the improved reconfigurable computing system and method of this invention is the ability to communicate information concerning hardware objects implemented in a single configuration file to the reconfigurable computing software driver.
Another technical advantage of this invention is the ability to support multiple hardware object interrupts from a reconfigurable computing platform on a host machine""s single interrupt line through the use of an interrupt flag and enable registers.
Similarly, a technical advantage of the present invention is having a reconfigurable computing software driver with the ability to call a correct interrupt event service routine provided by a software application when an interrupt is detected.
A still further technical advantage of the improved reconfigurable computing system and method of this invention is the ability to allow hardware objects to be partitioned into different FPGAs on the same board and allocated intelligently as the need for the objects arises.
Another technical advantage of this invention is the ability to provide multiple configuration files that supply the same or similar functionality and that are each targeted and configured to properly interface with different types of FPGAs.
Yet another technical advantage of the improved reconfigurable computing system and method of this invention is a reconfigurable computing system software driver that can manage the allocation of reconfigurable computing resources, hardware object usage, and sharing for application software programs. Additionally, the software driver can pass handles of hardware objects to software applications, and can determine from the reconfigurable computing card""s resource information whether or not a given reconfigurable computing card meets the requirements of an application requesting services.
A further technical advantage of this invention is the capability of a single configuration file to contain multiple hardware objects that may be used by many different dependent or independent software applications, and the ability for a single hardware object to be shared by multiple software applications. Similarly, a software application can utilize multiple hardware objects located on different reconfigurable computing boards in a system.
A still further technical advantage of the improved reconfigurable computing system and method of this invention is the capability of boosting the available power supply current to a card through a peripherals power supply when the host machine is unable to supply enough power for a required application. Likewise, another technical advantage of this invention is the ability for an external peripheral to supply a voltage supply of varying voltages for specifying the interface voltage of I/O signals to an interface card.
Another technical advantage of this invention is the easy adaptability of its technology to any bus type, such as a portable computing bus standard like PCMCIA.